Program Counter Design

The Program Counter (PC) is a Presettable Synchronous 16bit Binary Counter made up from 4 * 74HC161 counters. 

Inputs 

• LPC_F_AB - H = Load PC from Address Bus i.e. Preset
• NOTIFZF - H = Don't load PC from Address Bus if Zero Flag is set (used in conjunction with LPC_F_AB to implement JNZ). 
• ZEROFLAG - Zero flag from Status Register
• MR_L - Master Reset (Low) - When low forces PC to reset to all zeros
•  EPC - Enable PC - L = Ouput PC onto Address Bus.

  Inputs/Outputs

• A[0..15] - Address Bus. 
  

Usage 

In normal use the PC outputs its value onto the Address Bus and then on the rising edge of the clock increments by 1.
- EPC = L (output PC onto address bus)
- LPC_F_AB = L (do not load PC from address bus)
- NOTIFZF = L
- ZEROFLAG = X
- MR_L = H (do not perform a master reset and reset PC to zero)

The PC can also be loaded from the value present on the Address Bus.
- EPC = H (do not output PC onto address bus)
- LPC_F_AB = H (load PC from address bus)
- NOTIFZF (set to H to not load if Zero Flag is set e.g. JNZ)
- MR_L = H (do not perform a master reset and reset PC to zero)

When Juno is reset (e.g. power on) then foce the PC to reset to zero by setting MR_L low. This resets the PC irrespective of the clock and other inputs.